Electronic circuits, such as complementary metal-oxide-semiconductor (CMOS) circuits, p-channel metal-oxide-semiconductor circuits (PMOS), or n-channel metal-oxide-semiconductor circuits (NMOS), comprise a number of active and passive electronic components, such as thin-film transistors (TFTs) and capacitors. A typical TFT architecture comprises a suitably doped semiconductor wherein, or adjacent to which, drain and source regions are provided, said semiconductor being separated from a gate electrode by a suitable dielectric material. Usually a single TFT is implemented as a stack comprising a substrate, a first electrically conductive layer, a semiconductor, a dielectric, and a second electrically conductive layer. An electronic circuit may comprise a plurality of such electronic components, notably capacitors, thin film transistors (TFTs), as well as crossings of conducting layers, leading to a geometry of a dielectric layer being substantially sandwiched between the first and the second electrically conducting layers.
It is appreciated in the art of semiconductor technology that for many electronic circuit components a reduction in dielectric thickness improves their electrical characteristics, like switching speed, operating voltage, power consumption. In addition, miniaturization of critical lateral device dimensions, e.g. TFT channel length, necessitates a simultaneous reduction of the dielectric thickness, to ensure basic device scaling rules. It is generally known in semiconductor physics that when the channel length of a TFT becomes too short, its switching characteristics become less defined. Such short-channel effects include poor sub-threshold slope, shift of threshold voltage, and failure or current saturation, and are generally not desired. These phenomena are addressed in “Physics of Semiconductor Devices” by S. M. Sze, Wiley & Sons (New York), 1981. By simultaneously scaling down the dielectric thickness these short-channel effects can be avoided. Thus, to reach higher switching speeds, which is usually achieved by reducing the channel length, it is also necessary to scale down the dielectric thickness.
In addition, it is desirable to reduce the surface area of storage capacitors to reduce the risk of electrical shorts. This requires employment of thinner and/or higher permittivity dielectric layers.
However, with decreasing dielectric thickness, the risk of electrical shorts between electrically conductive layers on opposite sides of the dielectric layer increases. This phenomenon is usually referred to as breakdown. For some dielectrics electrical breakdown can depend not only on the applied voltage, but also on the duration of the applied voltage and the total amount of current flowing through the dielectric. Photosensitive materials, in particular, often exhibit relatively poor breakdown behavior. This can be attributed to their relatively high ion content, for example due to the use of photoinitiator materials (mixed into a photoresist) that contain or can form ionic components or radicals to create a suitable chemical reaction of the photoresist upon exposure to (UV) light during (UV) photo-lithography.